1. . Asynchronous inputs are:
(A) Clear, preset
(B) CLK
(C) Control inputs
(D) All are correct
2. . Asynchronous inputs of FFs are:
(A) Negative
(B) Level sensitive
(C) Transition sensitive
(D) Both level & transition
3. . Counters which goes through 10 unique combinations of output and then reset as the clock proceeds is called:
(A) Ring counter
(B) Decade counter
(C) BCD counter
(D) None of them
4. . Counters are used as instrument for measuring:
(A) Time
(B) Frequency
(C) Speed
(D) a and b
5. . For a four bit counter how many FFs are needed?
(A) 2
(B) 3
(C) 4
(D) 5
6. . A modulus-12 counter must have:
(A) 12 FFs
(B) 3 FFs
(C) 4 FFs
(D) 22 FFs
7. . Maximum modulus of a 4-bit binary counter is:
(A) 16
(B) 32
(C) 8
(D) 4
8. . Asynchronous counters are known as:
(A) Decade counters
(B) Ripple counters
(C) Modules counters
(D) Ring Counters
9. . A synchronous counter differs from an asynchronous counter in:
(A) Number of states in its count
(B) Method of clocking
(C) Type of FFs used
(D) Modulus number
10. . Modulus of counter indicates:
(A) Number of FFs
(B) Number of states in its sequence
(C) Minimum number of states
(D) All are correct
11. . A ripple Counter with any flipflop can function as a:
(A) n : 1 counter
(B) n / 2 : 1 counter
(C) 2n : 1 counter
(D) 2ⁿ : 1 counter
12. . Maximum count value of a n-bit counter:
(A) 2ⁿ - 1
(B) 2ⁿ
(C) 2²ⁿ
(D) 2ⁿ⁺¹
13. . Which technology is used in synchronous and asynchronous counter ICs:
(A) TTL
(B) CMOS
(C) Both
(D) None of them
14. . 3 cascaded decade counter will divide the input frequency by:
(A) 10
(B) 20
(C) 100
(D) 1000
15. . Every Flip-flop divide the input clock frequency by ________ and provide output clock frequency:
(A) 2
(B) 4
(C) 6
(D) 8
16. . The terminal count of a typical modulus-10 binary counter is:
(A) 0000
(B) 1010
(C) 1001
(D) 1111
17. . How many different states does a 3-bit asynchronous counter have:
(A) 2
(B) 4
(C) 8
(D) 16
18. . A 4-bit counter has a maximum modulus of:
(A) 3
(B) 6
(C) 8
(D) 16